Hardware FPGA DPS-8M Mainframe and FNP Project
A new project led by Dean S. Anderson aims to implement the DPS‑8/M mainframe architecture using FPGAs to run Multics OS. Progress includes FNP component implementation and transitioning software gradually. Ongoing development updates available.
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The DPS8M Blog announced a new project led by Dean S. Anderson to implement the DPS‑8/M mainframe architecture using FPGAs, aiming to run the full Multics operating system. Dean's background includes experience with Honeywell mainframes and software development. The project started with implementing the FNP component, specifically the DATANET 355, using Verilog on Terasic DE series FPGAs. The project involves transitioning software code from an ARM core to the FPGA gradually. The current status includes progress on the DN6678 CPU simulation, paged RAM implementation, and IOM design. The project aims to simulate a complete Honeywell / Bull Distributed Processing System mainframe using FPGA components. The development is ongoing, with discussions and resources available on the DPS8M GitLab repository and Slack workspace. Dean S. Anderson provides regular updates on the project's progress and challenges.
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4 commentsI don't know why, but somehow I fell so deeply in love with FPGAs. They are just pure fun. There are not that many "real" applications for it (or the needed FPGAs for that get really expensive very fast), but just tinkering around, building/rebuilding CPUs and application specific processors somehow just feels magical.
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