June 30th, 2024

Extreme Measures Needed to Scale Chips

Semiconductor technology faces challenges in scaling for AI demands. Innovations like EUV lithography and chip stacking are key. Japanese researchers explore linear accelerators for EUV light. Attracting young talent is crucial.

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Extreme Measures Needed to Scale Chips

In a recent article on IEEE Spectrum, the challenges of scaling semiconductor technology to meet the demands of artificial intelligence (AI) are discussed. With Dennard scaling reaching its limits in the mid-2000s, chipmakers have turned to innovative solutions like extreme ultraviolet (EUV) lithography systems to keep up with Moore's Law. Japanese researchers at the High Energy Accelerator Research Organization (KEK) are exploring the use of a linear accelerator as an EUV light source to advance semiconductor technology. While the industry faces obstacles in making smaller devices, there are promising developments such as brighter light sources and future complementary field-effect transistors (CFETs) that could enhance performance. Stacking chips is highlighted as an effective strategy to increase logic and memory capacity, especially for GPUs in the AI sector. The article also emphasizes the importance of attracting young talent to semiconductor engineering to ensure the field's continued advancement despite challenges to Moore's Law.

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By @smallstepforman - 3 months
We still have Gallium Arsenide (0.3V PN junction barrier), electron beam lithurgy, stacking up, and finally going back to efficient bare-metal coding. Still a magnitude level performance increase to go, but at a magnitude increase in cost. We might be at the economic sweet spot right now, it only gets more expensive from here …