Ampere AmpereOne Aurora 512 Core AI CPU Announced
Ampere has introduced the AmpereOne Aurora, a 512-core AI CPU for cloud-native computing, promising three times the performance per rack, integrated AI acceleration, and high-bandwidth memory, targeting AI training and inference.
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Ampere has announced the AmpereOne Aurora, a new 512-core AI CPU designed for cloud-native AI computing. This processor is part of Ampere's roadmap update, which also includes the existing AmpereOne processors that currently ship with up to 192 cores on a 5nm process. The upcoming AmpereOne M series, expected in Q4 2024, will maintain the 192-core configuration but will be built for a 12-channel DDR5 platform, with plans to reach 256 cores by 2025. The Aurora CPU is projected to deliver three times the performance per rack compared to current models, although specific per-chip performance metrics remain unclear due to power consumption factors.
The Aurora will feature integrated AI acceleration and high-bandwidth memory (HBM), indicating a shift towards more efficient chip designs that incorporate floating-point units directly into the system on chip (SoC). Ampere aims to target AI training and inference with this new architecture. While the process node for the Aurora has not been disclosed, there are indications that it may utilize multiple chiplets on a scalable mesh architecture. The announcement positions Ampere to compete with AMD and Intel, which have higher pricing structures for their enterprise offerings. Overall, the AmpereOne Aurora represents a significant advancement in Ampere's product lineup, emphasizing AI capabilities and integrated memory solutions.
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5 commentsThe existing Ampere chips are already massive (see previous STH videos etc), and most of that is because usually each time they double the number of cores, they usually double the number of memory lanes and IO lanes like PCI etc. But that's squashing ever more heat into a tiny (well, not so tiny with these chips) space.
I'm sure there are some good use cases where you might need that many cores on a single chip, like if there are lots of cache dependencies between all the threads, but I suspect the majority of these chips will end up carved up into smaller VMs and it seems to me that a multi-chip solution is probably more optimal for cooling and air flow.
I guess the counter argument is that chips designed using chiplets could still have a reasonable amount of space between each chiplet on the chip to allow each a greater cooling surface area and presenting one flat metal surface for cooling might perform better than several chips that potentially don't lie exactly co-planar.
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