Introducing the RP2350

My board runs SimpleFOC, and people on the forum have been talking about building a flagship design, but they need support for sensorless control as well as floating point, so if I use the new larger pinout variant of the RP2350 with 8 ADC pins, we can measure three current signals and three bridge voltages to make a nice sensorless driver! It will be a few months before I can have a design ready, but follow the git repo or my twitter profile [2] if you would like to stay up to date!

[1] https://github.com/tlalexander/rp2040-motor-controller

[2] https://twitter.com/TLAlexander

There's a lot going for the 2040, don't get me wrong. TBMAN is a really cool concept. It overclocks like crazy. PIO is truly innovative, and it's super valuable for boatloads of companies looking to replace their 8051s/whatever with a daughterboard-adapted ARM core.

But, for every cool thing about the RP2040, there was a bad thing. DSP-level clock speeds but no FPU, and no hardware integer division. A USB DFU function embedded in boot ROM is flatly undesirable in an MCU with no memory protection. PIO support is extremely limited in third-party SDKs like Zephyr, which puts a low ceiling on its usefulness in large-scale projects.

The RP2350 fixes nearly all of my complaints, and that's really exciting.

PIO is a really cool concept, but relying on it to implement garden-variety peripherals like CAN or SDMMC immediately puts RP2350 at a disadvantage. The flexibility is very cool, but if I need to get a product up and running, the last thing I want to do is fiddle around with a special-purpose assembly language. My hope is that they'll eventually provide a library of ready-made "soft peripherals" for common things like SD/MMC, MII, Bluetooth HCI, etc. That would make integration into Zephyr (and friends) easier, and it would massively expand the potential use cases for the chip.

Based on the RP2350, designed by Raspberry Pi in the United Kingdom

Dual Arm M33s at 150 MHz with FPU

520 KiB of SRAM

Robust security features (signed boot, OTP, SHA-256, TRNG, glitch detectors and Arm TrustZone for Cortex®-M)

Optional, dual RISC-V Hazard3 CPUs at 150 MHz

Low-power operation

PIO v2 with 3 × programmable I/O co-processors (12 × programmable I/O state machines) for custom peripheral support

Support for PSRAM, faster off-chip XIP QSPI Flash interface

4 MB on-board QSPI Flash storage

5 V tolerant GPIOs

Open source C/C++ SDK, MicroPython support

Software-compatible with Pico 1/RP2040

Drag-and-drop programming using mass storage over USB

Castellated module allows soldering directly to carrier boards

Footprint- and pin-compatible with Pico 1 (21 mm × 51 mm form factor)

26 multifunction GPIO pins, including three analog inputs

Operating temperature: -20°C to +85°C

Supported input voltage: 1.8 VDC to 5.5 VDC

[1] https://www.raspberrypi.com/news/raspberry-pi-pico-2-our-new...

[2] https://opensource.googleblog.com/2024/08/introducing-pigwee...

[3] https://blog.bazel.build/2024/08/08/bazel-for-embedded.html

[4] https://pigweed.dev/docs/showcases/sense/

[5] https://discord.gg/M9NSeTA

"The Hazard3 cores are optional: Users can at boot time select a pair of included Arm Cortex-M33 cores to run, or the pair of Hazard3 cores. Both options run at 150 MHz. The more bold could try running one RV and one Arm core together rather than two RV or two Arm.

Hazard3 is an open source design, and all the materials for it are here. It's a lightweight three-stage in-order RV32IMACZb* machine, which means it supports the base 32-bit RISC-V ISA with support for multiplication and division in hardware, atomic instructions, bit manipulation, and more."

Official product page: https://news.ycombinator.com/item?id=41192269

RP2350 looks very much like it could potentially run Quake. Heck, some of the changes almost feel like they're designed for this purpose.

FPU, two cores at 150 MHz, overclockable beyond 300 MHz and it supports up to 16 MB of PSRAM with hardware R/W paging support.

* By perception at least. They have been prioritizing industrial users from a revenue and supply standpoint, it seems.

* 2x Cortex-M33F * improved DMA * more and improved PIO * external PSRAM support * variants with internal flash (2MB) and 80 pins (!) * 512KiB ram (double) * some RISC-V cores? Low power maybe?

Looks like a significant jump over the RP2040!

Very nice that the "3" turned out to mean the modern M33 core rather than the much older M3 core. It has a real FPU!

4 variants? "A" and "B" variants in QFN60 and QFN80, "2350" and "2354" variants with and without 2MB Flash. CPU can be switched between dual RISC-V @ 150MHz or dual Cortex-M33 @ 300MHz by software or in one-time programming memory(=permanently).

Datasheet, core switching details, most of docs are 404 as of now; I guess they didn't have embargo date actually written in `crontab`.

e: and datasheet is up!

I imagine with the new secure boot functionality they've got a huge new range of customers to tempt to.

Also exciting to see them dip their toe into the open silicon waters with the hazard 3 RISCV core https://github.com/Wren6991/Hazard3.

Of course it they'd used Ibex https://github.com/lowrisc/ibex the RISC-V core we develop and maintain at lowRISC that would have been even better but you can't have everything ;)

HN: "I got almost all of my wishes granted with RP2350"

Article: "Why you should fall in love with the RP2350"

title tag: "Introducing the RP2350"

How difficult would be emulating an old SRAM chip with an RP2040 or an RP2350? It's an early 80s (or older) 2048 word, 200ns access time CMOS SRAM that is used to save presets on an old Casio synth. It's not a continuous memory read, it just reads when loading the preset to memory.

I feel like PIO would be perfect for that.

Whoops, I read the fine print: RP2350 is manufactured on a 40nm process node.

Sure, after integrating USB 2.0 HS or 1Gb-Ethernet the pico2-board will cost more than $5. So, integrated high-speed interfacing with PC was not a nice-to-have option (for special chip flavor)?

I got all mine, these guys really listened to the (minor) criticisms of the RP2040 on their forums and knocked them out of the ball park. Cant wait to get my hands on real hardware. Well done guys

Moving all GND pins to the bottom pad makes this chip usable only by people with a reflow oven. I really hoped to see at least a version released as (T)QFP.

https://github.com/raspberrypi/pico-sdk/commit/efe2103f9b284...

> However the Raspberry Pi engineer in question WAS compensated for the samples, in the form of a flight over downtown Austin in Dmitry's Cirrus SR22.

Hahah, I’ve been in that plane. Only in my case, it was a flight to a steak house in central California, and I didn’t actually do anything to get “compensated”, I was just at the right place at the right time.

Anyway, I am extremely excited about this update, RPi are knocking it out of the park. That there is a variant with flash now is a godsend by itself, but the updates to the PIO and DMA engines make me dream up all sorts of projects.

Raspberry Pi Pico 2, our new $5 microcontroller board, on sale now

https://news.ycombinator.com/item?id=41192341

> So, in conclusion, go replan all your STM32H7 projects with RP2350, save money, headaches, and time.

STM32H7 chips can run much faster and have a wider selection of peripherals than RP2350. RP2350 excels in some other dimensions, including the number of (heterogenous) cores. Either way, this is nowhere near apples-to-apples.

Further, they're not the only Cortex-M7 vendor, so if the conclusion is that STM32H7 sucks (it mostly doesn't), it doesn't follow that you should be instead using Cortex-M33 on RPi. You could be going with Microchip (hobbyist-friendly), NXP (preferred by many commercial buyers), or a number of lesser-known manufacturers.

Except the STM32H7 series goes up until 600MHz.

Overclocking is cool, but you can't do that on most commercial projects.

I mean, there's erratums about obscure edge cases, about miniscule bugs. Sure, mistakes happen. And then there's this: Internal pull-downs don't work reliably.

Workaround: Disconnect digital input and only connect while you're reading the value. Well, great! Now it takes 3 instructions to read data from a port, significantly reducing the rate at which you can read data!

I guess it's just rare to have pull-downs, so that's naturally mitigating the issue a bit.

https://buspirate.com/

says the guy with engineering samples and creme of the creme silicon parts... i expect most that will actually be available when they do to their normal schedule of scraping the literal bottom of the barrel to keep their always empty stocks that will not be the case.