August 27th, 2024

Box64 and RISC-V in 2024: What It Takes to Run the Witcher 3 on RISC-V

In August 2024, The Witcher 3 became the first AAA game to run on RISC-V architecture, showcasing advancements in emulation despite ongoing challenges with x86 instruction support and performance.

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Box64 and RISC-V in 2024: What It Takes to Run the Witcher 3 on RISC-V

In August 2024, significant progress was reported in running x86 games on RISC-V architecture, particularly with the successful execution of The Witcher 3, marking it as the first AAA game to run on a RISC-V machine. This achievement was made possible through the Box64 emulator, Wine, and DXVK, following a year of development that included fixing numerous bugs in the RV64 DynaRec and implementing new x86 instructions. Initially, the RISC-V backend could only handle simpler Linux games due to limitations in graphics support and instruction set completeness. The introduction of devices like the Milk-V Pioneer, which supports AMD graphics cards, allowed for broader testing and improvements. Despite the advancements, challenges remain, particularly in the emulation of certain x86 instructions that are not well-supported in RISC-V, leading to less efficient translations. The current implementation of RISC-V still lacks critical instructions for efficient x86 emulation, which affects performance. Nevertheless, the ability to run The Witcher 3 at up to 15 frames per second demonstrates the potential of RISC-V for gaming applications.

- The Witcher 3 is the first AAA game successfully run on a RISC-V machine.

- Progress in RISC-V emulation has been made through the Box64 emulator and new hardware support.

- RISC-V currently lacks certain x86 instructions, impacting emulation efficiency.

- The Milk-V Pioneer and other devices have enabled better graphics support for RISC-V.

- Despite limitations, RISC-V shows promise for future gaming applications.

AI: What people are saying
The discussion surrounding The Witcher 3's emulation on RISC-V architecture reveals several key themes and insights.
  • Commenters express curiosity about the technical differences in software engineering for RISC-V compared to x86, particularly regarding optimization and instruction set limitations.
  • There is a recognition of the challenges faced in emulating x86 on RISC-V, with some noting the need for more instructions to achieve feature parity.
  • Several users share their experiences with other emulation projects and hardware, highlighting the growing capabilities of RISC-V and its potential for gaming.
  • Optimizations and performance comparisons between RISC-V and other architectures, such as ARM and x86, are discussed, emphasizing the importance of efficient instruction sets.
  • Overall, the comments reflect a mix of excitement and skepticism about the future of RISC-V in gaming and computing.
Link Icon 24 comments
By @jokoon - 5 months
Question for somebody who doesn't work in chips: what does a software engineer has to do differently when targeting software for RISC5?

I would imagine that executable size increases, meaning it has to be aggressively optimized for cache locality?

I would imagine that some types of softwares are better suited for either CISC or RISC, like games, webservers?

By @theragra - 5 months
Reminded me how one famous Russian guy ran Atomic Heart on Elbrus 8S.

Elbrus has native translator, though, and pretty good one, afaik. Atomic Heart was kinda playable, 15-25 fps.

By @littlecranky67 - 5 months
Article is a bit short on "the basics" - I assumed they used some kind of wine port to run it. But it seems they implemented the x86_64 ISA on a RISC-V chip in some way - anyone can shed more light on that part how that is done?
By @brandonpelfrey - 5 months
Incredible result! This is a tremendous amount of work and does seem like RV is at its limits in some of these cases. The bit gather and scatter instructions should become an extension!
By @Manfred - 5 months
> At least in the context of x86 emulation, among all 3 architectures we support, RISC-V is the least expressive one.

RISC was explained to me as a reduced instruction set computer in computer science history classes, but I see a lot of articles and proposed new RISC-V profiles about "we just need a few more instructions to get feature parity".

I understand that RISC-V is just a convenient alternative to other platforms for most people, but does this also mean the RISC dream is dead?

By @int0x29 - 5 months
That screenshot shows 31 gb of ram which is distinctly more than the mentioned dev board at max specs. Are they using something else here?
By @mrlonglong - 5 months
Is this the 86Box? I found it fun reliving the time I got my Amstrad PC1512, I added two hard cards of 500MB and a 128k memory expansion to 640KB which made things a lot more fun. Back then I only had two 360KB floppies and added a 32MB hard card a few years later. I had Borland TurboPascal and Zortech C too. Fun times.
By @bee_rider - 5 months
I wonder if systems will ship at some point that are a handful of big RISC-V CPUs, and then a “GPU” implemented as a bunch of little RISC-V CPUs (with the appropriate vector stuff—actually, side-question, can classic vectors, instead of packed SIMD, be useful in a GPU?)
By @lyu07282 - 5 months
Another technically impressive Witcher 3 feat was the Switch port, it ran really well. Goes to show how much can be done with optimization and how much resources are wasted on the PC purely by bad optimization.
By @justahuman74 - 5 months
I hope they're able to get this ISA-level feedback to people at RVI
By @nikitau - 5 months
I'm not very familiar with the ecosystem, but I have used this on an RPi4 to run some games through wine.

I'm wondering, how's the landscape nowadays. Is this the leading project for x86 compatibility on ARM? With the rising popularity of the architecture for consumer platforms, I'd guess companies like Valve would be interested in investing in these sort of translation layers.

By @Beijinger - 5 months
Previously: https://news.ycombinator.com/item?id=19118642

And:

Milk-V Pioneer A 64-core, RISC-V motherboard and workstation for native development

https://www.crowdsupply.com/milk-v/milk-v-pioneer

By @sylware - 5 months
lol, I am going the other way around.

Since RISC-V ISA is worldwide royalty free and more than nice, I am writting basic rv64 assembly which I do interpret on x86_64 hardware with a linux kernel.

I did not push the envelop up to have a "compiler", because it is indeed while waiting for hardcore performant desktop, aka large, rv64 hardware implementations.

By @anthk - 5 months
I used to use GL4ES on the PocketCHIP. And I daily use it on a netbook to get more performance on some GL 2.1 games.
By @Thaxll - 5 months
Box86 is so good, I run x86-64 steam games ( servers ) on free Oracle instance ( ARM64 ) with it.
By @high_na_euv - 5 months
Great game choice!
By @victor_cl - 5 months
I remember learning RISC-V in Berkeley CS61C. Anyone from Berkeley?
By @stuckinhell - 5 months
wow very impressive
By @sdwrj - 5 months
box64 is getting too advanced lol
By @nolist_policy - 5 months
> The x86 instruction set is very very big. According to rough statistics, the ARM64 backend implements more than 1,600 x86 instructions in total, while the RV64 backend implements about 1,000 instructions

This is just insane and gets us full-circle to why we want RISC-V.

By @Havoc - 5 months
>15 fps in-game

Wow...that's substantially more than I would have guessed. Good times ahead for hardware

By @KingOfCoders - 5 months
"which allows games like Stardew Valley to run, but it is not enough for other more serious Linux games"

Hey! ;-)